Regviz

Silicon Labs /EFR32FG23B010F128GM40 /AGC_S /ANTDIV

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as ANTDIV

Share

Cut and paste this URL to share the unmodified register and value:

https://regviz.com/r/Silicon Labs/EFR32FG23B010F512IM40/AGC_NS/ANTDIV#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (DISABLE)GAINMODE 0DEBOUNCECNTTHD0 (DISRSSIANTDIVFIX)DISRSSIANTDIVFIX

GAINMODE=DISABLE

Description

No Description

Fields

GAINMODE

Antenna gain restore mode

0 (DISABLE): Gain restore feature disabled

1 (SINGLE_PACKET): Gain restore enabled. The stored gain will be cleared when current RX off.

2 (ALWAYS): Gain restore enabled. The stored gain will be kept across packets.
DEBOUNCECNTTHD

Gain restore debounce timer threshold
DISRSSIANTDIVFIX

Disables RSSI fix for antenna diversity

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data